1. Field of the Invention
The present invention is related to an integrated circuit package structure, more particularly, is related to an integrated circuit package structure implemented by lead on chip (LOC) and chip on lead (COL) technique.
2. Description of the Prior Art
In recent years, the back end process of the semiconductor package is 3-dimension (3D) package process in order to use less area with higher density or higher memory storage volume. In order to achieve this object, the multi-chips stacked are used in 3D package process.
In prior art, such as U.S. Pat. No. 6,744,121, it is a multi-chips stacked package structure with lead frame, as shown in FIG. 1a. Obviously, the lead frame in the package structure of FIG. 1a is bent several times to avoid the metal wires on the bottom chip are contacted to the bottom of the top chip. The metal wires of the bottom chip are protected in accordance with the formation of the height difference by bending the lead frame. However, the lead frame is bent several times and is easy to be deformed. The rest of the chips are hard to stack correctly. Besides, the bent lead frame is easy to loose the package structure so as the package structure can be reduced. Besides, because the lead frame is bent several times, the adhesive area between the chips and the lead frame is not enough and the chips are easy to be loosed during the molding process.
Besides, other multi-chips stacked package structure by using lead frame is disclosed in U.S. Pat. Nos. 6,838,754 and 6,977,427, as shown in FIG. 1b and FIG. 1c. During the connection between the top chip and the bottom chip, the bottom of the top chip is easy to contact to the metal wires of the bottom chip and cause the short circuit or the metal wires loosed in the embodiments shown in FIG. 1b and FIG. 1c. 
Besides, multi-chips stacked in a package structure are easy to cause the heat effect when the multi-chips are operated. When the heat is hard to release from the multi-chips stacked package structure, the reliability of the chips are decreased.